In April, Hynix announced the production of 2 GiB DDR4 modules at 2400 MT/s, also running at 1.2 V on a process between 30 and 39 nm (exact process unspecified), adding that it anticipated commencing high volume production in the second half of 2012.
It has a maximum data transfer rate of 2133 MT/s at 1.2 V, uses pseudo open drain technology (adapted from graphics DDR memory ) and draws 40% less power than an equivalent DDR3 module. 2011: in January, Samsung announced the completion and release for testing of a 2 GiB DDR4 DRAM module based on a process between 30 and 39 nm.However, DDR4 test samples were announced in line with the original schedule in early 2011 at which time manufacturers began to advise that large scale commercial production and release to market was scheduled for 2012. 2010: subsequently, further details were revealed at MemCon 2010, Tokyo (a computer memory industry event), at which a presentation by a JEDEC director titled 'Time to rethink DDR4' with a slide titled 'New roadmap: More realistic roadmap is 2015' led some websites to report that the introduction of DDR4 was probably or definitely delayed until 2015.2009: in February, Samsung validated 40 nm DRAM chips, considered a 'significant step' towards DDR4 development since in 2009, DRAM chips were only beginning to migrate to a 50 nm process.DDR4 was described as involving a 30 nm process at 1.2 volts, with bus frequencies of 2133 MT/s 'regular' speed and 3200 MT/s 'enthusiast' speed, and reaching market in 2012, before transitioning to 1 volt in 2013. 2007: some advance information was published in 2007, and a guest speaker from Qimonda provided further public details in a presentation at the August 2008 San FranciscoIntel Developer Forum (IDF).The high-level architecture of DDR4 was planned for completion in 2008. 2005: standards body JEDEC began working on a successor to DDR3 around 2005, about 2 years before the launch of DDR3 in 2007.